Dc to dc converter circuit with load voltage regulation utilizing a controlled simulated saturating core

ABSTRACT

An inverter circuit driving a ferroresonant regulator utilizes a feedback controlled switching frequency arrangement to regulate its output voltage with respect to both line and load conditions. A deviation in the output voltage alters the switching frequency of the inverter by altering the simulated saturation of a switching control transformer core included in the inverter circuit. The output voltage of the ferroresonant regulator, which is proportional to the inverter frequency, is adjusted to some regulated value. Saturation of the inverter transformer is simulated by controlling the volt-time area of the output voltage waveform of the inverter transformer.

, United States atent [72] Inventor Robert J. Kalaalec Madison, NJ.

Sept. 24, 1969 June 29, 1971 Bell Telephone Laboratories, IncorporatedMurray Hill, NJ.

[21 Appl. No. [22] F iled. [45] Patented [73] Assignee [54) DC'TO DCCONVERTER CIRCUIT WITH LOAD VOLTAGE REGULATION UTILIZING A CONTROLLEDSIMULATED SATURATlNG CORE 8 Claims, 4 Drawing Figs. s2 us.c|....-.321/4511,

w v 321/l8,32l/68,33l/l13A' s11 Int.Cl nozm 7/48 [50] Field ofsearch32l/2,45; 331/113.1

[56] 1 References Cited UNITED STATES PATENTS 3,210,690 10/1965 hakrgtzk ieral... 331/113 .1 3,317,856 5/1967 Wilkinson.

3,403,319 9/1968 Tate 33l/ll3(.l)X 3,466,570 9/1969 Webb.... 321/2 X3,487,335 l2/l969 Lingle 32l/2X OTHER REFERENCES Geyger, William A.,Frequency Control of Magnetic Multivibrators," ELECTRONICS, July 24,1959, pp. 54- 56 (copy in 331/1 13.1)

Primary Examiner-William M. Shoop, Jr. Altomeys-R. .1. Guenther and E.W. Adams, Jr.

ABSTRACT: An inverter circuit driving a ferroresonant regulator utilizesa feedback controlled switching frequency arrangement to regulate itsoutput voltage with respect to both line and load conditions. Adeviation in the output voltage alten the switching frequency of theinverter by altering the simulated saturation of a switching controltransformer core included in the inverter circuit. The output voltage ofthe ferroresonant regulator, which is proportional to the inverterfrequency, is adjusted to some regulated value. Saturation of theinverter transformer is simulated by controlling the volttime area ofthe output voltage waveform of the inverter transformerPATENTEUJUHZQIHTI 35,90,352

- sum 1 OF 2 INVENTOR R. J. KA KAL EC A T TORNE V PATENTEB JUN29 IanSHEET 2 BF 2 FIG 2A no TO Dc coNvEnT a CIRCUKT WITH LOAD VOLTAGEREGULATIONUTILIZING A CONTROLLED SIMULATED SATURATING CORE 1 BACKGROUNDOF THE lNVENTION This invention relates to converter circuits and moreparticularly to free running static inverter circuits and is primarilyconcerned with regulation of the output voltage of the converter circuitby controlling the inverter switching frequency.

Static inverter circuits normally comprise power oscillators utilized toconvert a DC voltage to a sinusoidal or square wave AC voltageLTheseinverters may include a line regulator and be coupled with a subsequentrectifier'circuit to provide a converter capable of converting a DCvoltage from one voltagelevel to another voltage level. Such staticinverters are frequently embodied in a push-pull type configuration forapplications involving moderate power levels. The push-pull typeinverter circuit comprises two alternately operated switching devices.These switching devices are alternately switched into conduction andenable alternate current paths. The alternate current paths supplycurrent to alternately magnetize a transformer core in oppositedirections. Feedback from the transformer controls the switching of theswitching devices.-

The push-pull type inverter may beoperated in two modes. In one mode theinverter is operated so that the transfonner is magnetized within itslinear range. In the second and preferred jrnode of operation,thetransformer is magnetized to saturate in opposite directions during eachcycle of operation. The frequency at which the inverter switches in thesecond mode is controlled by the voltage magnitude of the energizingsource and the characteristics of the saturating transformer. For agiven saturating transformer, the output voltage magnitude generated bythe inverter is directly proportional to the frequency of the saturationof the core.

Inverters are not suitable as a power supply where a very preciseregulated output voltage is desired. The inverter switching frequency issensitive to the magnitude of the supply voltage which energizes theinverter. If the supply voltage varies slightly, the frequency at whichthe inverter operates also varies and, in the case of the inverterutilizing saturating cores, the amplitude of the output voltage varies.In addition, the typical saturating transformer-type inverter does notreadily permit regulation of the output voltage if the load currentchanges. I

At present the switching frequency of inverters utilizing saturatingcores is regulatedby carefully regulating the DC supply voltage used toenergize the inverter. A subsequent independentregulator circuit is usedto regulate the output voltage of the inverter with respect to the load.Converter systems incorporating inverters and independent auxiliaryregulators, however, are complex and in addition do not-permit easyadjustment because the saturation characteristics of the saturatingtransformer of the inverter are fixed.

It is therefore an object of the invention to regulate the outputvoltage of a converter including a free running inverter circuit withrespect to line voltage and output load current changes.

It is another object of the invention to control the frequency of aninverter circuit independently of variations in the supply voltageenergizing the inverter. v

SUMMARY or THE INVENTION Therefore, in accord with the invention,regulation of the output voltage supplied by a converter is accomplishedby controlling the switching frequency-at which the included invertercircuit operates. The inverter drives a ferroresonant regulator whoseoutput voltage is proportional to the switching frequency of theinverter. The frequency control is accomplished by varying the simulatedsaturating characteristics of theinverter transformer in response tochanges in the output voltage of the ferroresonant regulator.

In a particular converter disclosed herein as illustrative of theprinciples of the invention, a saturating core-type inverter I circuitincludes an integrator circuit arrangement with a variable integrationconstant to integrate the voltage output of the inverter transformer.The integrator controls a gate which shunts the windings of the invertertransformer. The gate is triggered into conduction by the integratorupon the attainment of a volt-time integral determined by theintegration constant of the integrator. The conducting gate shorts outthe windings of. the inverter transformer simulating saturation therein.A linear inductor included in series with the conducting gate suppliesthe reverse voltage to initiate switching in the inverter circuit. Thevariable integration constant is adjusted in response to changes in theoutput voltage of the converter. By thus controlling the variableintegration constant the inverter frequency is altered and incombination with the ferroresonant regulator regulates the outputvoltage of the converter.

f In the particular embodiment herein, line and load regulation arecombined by including a ferroresonant regulator wound on the same coreas the inverter transformer and isolated therefrom by magnetic shunts.Feedback from the output of the ferroresonant regulator is utilized tovary the aforementioned integration constant.

BRIEF DESCRIPTION OF THE DRAWINGS Many objects,.advantages and featuresof the invention in addition to those enumerated above will becomereadily apparent upon examination of the attached drawings incombination with the following detailed specification wherein:

FIG. 1 is a schematic diagram of an inverter with simulated saturationof its transformer core;

FIGS. 2A and 2B are waveforms comparing the output voltagecharacteristics of a conventional saturating core-type inverter and aninverter utilizing simulated saturation of its transformer according tothe present invention; and

FIG. 3 is a schematic diagram of an illustrative embodiment of aconverter according to the principles of the invention including afeedback circuit to permit load regulation of the voltage output of theconverter.

DETAILED DESCRIPTION The inverter in FIG. 1 is energized by voltagesupplied by an unregulated voltage source 1 which may comprise a batteryor suitable substitute therefor. The inverter by alternately switchingthe two switching transistors 10 and 20 into conduction, andtherebyaltemately magnetizing the transformer core 5 in opposing directions,supplies an alternating voltage at the output terminals 51 ad 52. Theoutput voltage waveform takes the form of a square wave. The core oftransformer 5 of the inverter, while operating within its linearmagnetization range, responds to a saturation simulation circuit 15 tosimulate the performance of a saturating transformer. The simulatedsaturation of the core of transformer 5 is accomplished by controllingthe volt-time area of the output voltage waveform of the transformer.The operation of the circuit of FIG. 1 may be readily explained bydescribing a typical cycle of its operation.

It is assumed herein for the purposes of explanation that the invertercircuit is operating in its steady state condition. The startingoperation of the typical inverter circuit depends on the use of aspecial starting circuit or on the existence of an unbalance in the twoswitching devices of a push-pull arrangement. The starting operation ofinverters is well detailed in the technical literature and hence it isnot believed necessary to describe this process herein.

' Initially, consider the switching transistor 10 to be in its saturatedconducting state and the switching transistor 20 to be in its cutoff ornonconducting state. A current in response to the voltage source 1 flowsthrough the collector-emitter path of the switching transistor 10,through the transformer winding 33-34 back to the source 1. This currentincreases in magnitude until limited by the reflected impedance from thesecondary of the transformer 5. As this current increases, a voltage isinduced in the transformer winding 31-32 due to its mutual coupling withthe transformer winding 33-34. This 39. Saturation is electronicallysimulated by shorting the transformer winding 38-39 and thereby abruptlyreducing the output voltage to zero.

The saturation simulation circuit 15 includes an RC timing circuitshunting the winding 38-39. The RC timing circuit comprises the variableresistor 41 and the timing capacitor 42. The timing capacitor 42 ischarged by current supplied from the winding 38-39. The rate at whichthe capacitor 42 charges is controlled by the resistance level to whichthe variable resistor 41 is set. A series connected inductor 43 andtriac 46 also shunt the secondary winding 38-39. The capacitor 42 iscoupled to the gate lead 64 of the triac 46 by two series connected andoppositely poled zerner diodes 44 and 45. The triac 46 operatesfunctionally as would two silicon controlled rectifiers coupled in aninverse parallel connection and triggered into conduction by a commongate lead. The characteristics of the triac device are described forinstance in the RCA Transistor Manual- Technical Series SC-l 3, 1967,pages 387-404, and it is not believed necessary to discuss the triacherein.

Upon the attainment of a predetermined charge level on the timingcapacitor 42, the voltage thereon is sufficient to reversebias one ofthe series connected pair of oppositely poled zener diodes 44 and 45.The oppositely poled zener diodes respond to the oppositelypoledvoltages generated in the transformer winding 38-39 and acrosscapacitor 42 during successive half cycles.

When one of the zener diodes is reverse biased or breaks down the chargeon the capacitor 42 is coupled to the gate lead 64 of the triac 46,thereby switching the triac 46 into a conducting state-With the triac 46in a conducting state, the inductor 43 is shunted across its secondarywinding 38-39. The inductor 43 is very low in impedance and hence forall practical purposes, the secondary winding 38-39 is shorted. Hencethe voltage across the secondary winding 38-39 rapidly decays to anegligible level.

The inertial current characteristic of the inductor 43 induces a reversevoltage in the winding 38-39. This reverse voltage is applied, via thetransformer winding 31-32, to the base 11 of the switching transistorand rapidly switches it into its cutoff or nonconducting state. Avoltage is also induced in the transformer winding 36-37 which iscoupled to the base 21 of the switching transistor 20. This voltagerapidly biases the switching transistor 20 into a conducting state. Whenthe inertial current flow through the inductor 43 ceases, the triac 46switches into its nonconducting state.

With the switching transistor 20 switched into its conducting state, acurrent flows from the voltage source 1 through the collector-emitterpath of switching transistor 20 and the transformer winding 34-35. Asthis current begins to increase in magnitude in the transformer winding34-35, a voltage is induced in the transformer winding 36-37 causing thecurrent therein to increase. This increasing current in transformerwinding 36-37 is applied to the base 21 of the switching transistor 20and biases the switching transistor 20 into a higher conducting stateand eventually drives it into saturation.

As the current through transistor 20 increases a voltage is induced inthe transformer winding 38-39 in a direction opposite to the voltageinduced in this winding during the previous half cycle of operation. Inresponse to this induced voltage, a current flows through the timingcircuit to charge the timing capacitor 42 in a polarity opposite to thecharging polarity of the previous half cycle of operation. When thetiming capacitor 42 acquires a threshold charge sufficient to break downthe oppositely poled one of the zener diodes 45 and 44, a triggeringcurrent is applied to the gate lead 64 of the triac 46 switching it intoits conducting state.

With the triac 46 conducting, the inductor 43 is shunted across thewinding 38-39 and, as described above, subsequently induces a reversevoltage in the winding 36-37. This reverse voltage biases the switchingtransistor 10 into its conducting state. It is apparent that theabove-described switching cycle is repeated as the switching transistor10 is again biased into its conducting state.

The output voltage waveforms of the above-described inverter, shown inFIG. 2B, is compared with the output voltage wavefonns of a typicalsaturating core-type inverter, shown in FIG. 2A. Waveforms I, II, andIII, in FIG. 2A represent the differing frequency response of a typicalinverter using a satura ble transformer to variations in the level ofthe supply voltage. As the supply voltage level decreases, as shownprogressively by waveforms I, II, and III, the period of switching T Tand T increases resulting in a decreased frequency of operation. Becausethe saturation characteristics of the transformer core are fixed thevolt-time areas A,, A and A of waveforms I, II, and III are equal. InFIG. 2B, waveforms I, II, and Ill represent the adjustable response ofan inverter embodying the principles of the invention to a decreasingsupply voltage of the same magnitude as shown in FIG. 2A. The periods ofswitching T T and T of the waveforms I, II, and III are maintained equaland the volt-time area of the output voltage decreases with thedecreasing level of the supply voltage. The volt-time area of the outputvoltage is changed by controllably varying the integration constant ofthe saturation simulation circuit 15 as the supply voltage decreases.

It is apparent from the foregoing that the switching frequency of theinverter, according to the invention, may be adjusted by varying therate at which the timing capacitor 42 charges. By controlling theswitching frequency of the inverter in response to changes in the outputvoltage of the converter, the voltage output may be both line and loadregulated by utilizing a single ferroresonant regulator as describedbelow.

The circuit arrangement shown in FIG. 3 regulates the output voltage ofthe converter derived from the inverter 50 by utilizing feedback fromthe output at the load to control the integration constant of thesaturation simulation circuit 15. This feedback arrangement controls thecharging rate of the timing capacitor 42 in order to regulate the outputvoltage supplied by the converter at output terminals 81 and 82.

In the illustrative embodiment shown in FIG. 3 the rectified outputvoltage at terminals 81 and 82 is derived from the saturatingtransformer winding 61-62, and the full wave rectifier diode bridge 66.Feedback control from the output terminals 81 and 82 to the saturationsimulation circuit 15 is supplied, via the integration constant controlcircuit 16.

The integration constant control circuit 16 comprises a transistor 70whose transconductive path connects the opposite terminals a and c of abridge circuit 65. zener terminals b and d of the bridge circuit 65shunt a zener value resistor 47 included in the charging path of thetiming capacitor 42. The base 71 of the transistor 70 is connected to apotentiometer 75 shunting the output terminals 81 and 82. The emitter 72of the transistor 70 is connected to the junction of the seriesconnected Zener diode 67 and resistor 74 which together shunt the outputterminals 81 and 82. The Zener diode 67 derives a reference voltage fromthe output voltage which is applied to the emitter 72. It is apparentfrom the foregoing description that variation in the output voltage willalter the emitter-base bias of transistor 70 and hence in turn alter thetotal resistive impedance in the charging path for the capacitor 42.

The inverter 50 switches at a frequency which is determined by themagnitude of the supply voltage supplied by voltage source I and thecharging rate of the timing capacitor 42. The switching of the inverter50 produces a square wave output signal which appears across thetransformer winding 38-39. A slightly altered version of this waveformappears across the transformer winding 61-63. As described above, thesaturation simulation circuit integrates the voltage output of thetransformer winding 38-39 and upon the attainment of a predeterminedvolt-time area of the voltage waveform connects the inductor 43 inparallel with the winding 38-39. The shunting of inductor 43 acrosswinding 38-39 initiates the bias voltage reversal to cause the inverter50 to switch the direction of magnetization in the core of transformerS.

The volt-time area and frequency controlled square wave voltage outputof winding 38-39 is magnetically coupled to the saturating winding 61-63which is shunted by the capacitor 68. Together these components comprisea ferroresonant regulator 69. The magnetic shunts 60 provide sufficientisolation from the inverter transformer windings to permit winding 61-63to saturate. The magnetic core structure of the winding 61-63 in theferroresonant regulator 69 is saturated in opposite directions-duringeach successive half cycle of operation. This saturation ensures thatthe flux linkage to the output winding 61-63 during each half cycle isfairly constant. The

' only variable that alters the output voltage is the frequency at whichsaturation occurs which is controlled by the inverter switchingfrequency. The capacitance of capacitor 68 is selected to be nearresonance with the leakage inductive reactance derived from the magneticshunt 60 at the normal operating frequency. The capacitor 68 causes thevoltage across winding 61-63 to be increased and hence drives the coreof winding 61-63 into saturation while the core of winding 38-39 remainsunsaturated. The magnetic shunts 60 provide a magnetic path for thesaturating flux to circulate independent of the core of winding 38-39.Afull wave rectifier bridge 66 shunts the transformer winding segment61-62, and rectifies the output waveform of the voltage thereon. Therectified voltage signal is filtered to reduce the ripple content by thecapacitor 73 and is applied to output terminals 81 and 82 which may becoupled to a load circuit.

The operation of the feedback arrangement to regulate the output voltageon terminals 81 and 82 may best be explained by explaining the responseof the inverter and feedback regulation circuit to a change in the inputsupply voltage energizing the inverter. For example, if the supplyvoltage 1 of the inverter 50 increases, its switching frequency willincrease. This increase in switching frequency occurs because theincreased voltage charges the timing capacitor 42 more rapidly to thevoltage level at which the simulated saturation of winding 38-39 occurs.The average voltage level on the transformer winding 61-62 increasesbecause the frequency at which saturation occurs increases. Hence,thefixed volt-time areas of the periodic output voltage waveforms onwinding 61-62 are now generated at a higher frequency. Accordingly, theoutput voltage at terminals 81 and 82 increases in magnitude. Asdescribed hereinabove, the charging rate of the timing capacitor 42 andhence the volt-time area of the voltage output of the inverter 50 iscontrolled by the integration constant control circuit 16 which isresponsive to the output voltage on terminals 81 and 82. I

The zener diode 67 maintains the emitter 72 at a fixed referencevoltage. Since the output voltage at terminals 81 and 82 has increasedin magnitude, the voltage balance of the potentiometer 75 is altered andthe resulting voltage applied to the base electrode of transistor 70biases its transconductive path into a condition of higher impedance. Byincreasing the impedance of the transconductive or collector-emitterpath of transistor 70, the resistance through which the capacitor 42 ischarged is increased. It now takes longer for the capacitor 42 toacquire a sufficient charge to break down one of the zener diodes 44 and45 and activate the triac 46. Hence, since the charging time isincreased, the switching frequency of the inverter 50 is decreased. Withthe inverter switching frequency reduced, the output voltage supplied atthe transformer winding 61-62 is decreased thereby lowering the outputvoltage of the converter to its desired regulated value. It is apparentthat the aforedescribed feedback circuit will constantly control theswitching frequency of the inverter 50 to maintain the regulated outputvoltage at terminals 81 and 82 at a fixed predetermined magnitude.

What 1 claim is: v

1. A DC to DC converter comprising an inverter circuit including atransformer with a feedback primary winding and an output secondarywinding, and means to control the switching frequency of said inverter,said means to control including a volt-time integrator to integrate thevoltage across said output secondary winding, said volt-time integratorcomprising a resistance with impedance adjustment means and a capacitor,a shunt path coupled across said output secondary winding, said shuntpath including a low impedance linear inductive reactance and asemiconductor gate connected in series thereto, said semiconductor gatehaving a control electrode, means to activate said gate in response to aparticular voltage magnitude across said capacitor including a voltagethreshold breakdown diode coupling said capacitor voltage to saidcontrol electrode, said inductive reactance inducing a reverse voltagein said output secondary winding to initiate switching action in saidinverter circuit when said gate is activated.

2. A DC to DC converter as defined in claim 1 wherein said transformerincludes a saturating winding isolated from said inverter circuit andrectifying means to derive a voltage from said saturating winding.

3. A DC to DC converter as defined in claim 2 wherein a feedbackarrangement responds to variation in the voltage output of saidrectifying means to alter the impedance of said resistance.

4. A free running voltage regulated inverter circuit comprising' twotransistors, a transformer having a primary winding and first and secondsecondary windings, said transformer including a magnetic path common tosaid primary and said first secondary winding having linear magneticcharacteristics and magnetic shunt means to separate said first andsecond secondary windings, said two transistors coupled to the primarywinding of said transformer in a push-pull arrangement, means tosimulate magnetic saturation in said first secondary winding of saidtransformer including an energy storage device, means to control therate at which said energy storage device stores energy, an inductivereactor, gating means responsive to a predetermined energy level in saidenergy storage device to shunt said inductive reactor across said firstsecondary of said transformer, said second secondary winding wound on amagnetic path of said transformer having saturating characteristics, andfeedback means from said second secondary winding to said means tocontrol the rate whereby deviations in the voltage magnitude derivedfrom said second secondary winding are utilized to adjust said means tocontrol the rate to regulate the charging rate of said energy storagemeans which in turn controls the switching frequency of said inverter inorder to regulate the voltage output of said second secondary winding.

5. A free running voltage regulated inverter circuit as defined in claim4 wherein said means to control the rate comprises a variable impedanceincluding a diode bridge coupled in parallel with a fixed impedance anda transistor whose collector-emitter path shunts opposite terminals ofsaid diode bridge and whose base is coupled to the voltage output ofsaid second secondary winding.

6. A free running voltage regulated inverter circuit as defined in claim5 wherein said inductive reactor and said gate are series connected, thesaid series connection being connected in shunt with said firstsecondary winding whereby the reverse voltage characteristic of saidinductive reactor induces .switching in the transistors of said inverterwhen said gate is triggered into conduction.

7. A free running voltage regulated inverter as defined in claim 6wherein said gate comprises a triac and a threshold responsive device totrigger said triac.

8. A DC to DC converter comprising a push-pull square wave invertercircuit in which two switching'transistors are arranged in aself-oscillating arrangement in combination with a transformer toproduce an alternating current in the windings of the transformer, meansto simulate saturation in at least a portion of the core of saidtransformer common to said inverter circuit, said means to simulateincluding means to integrate the voltage applied to the windings of saidtransformer, said means to integrate comprising a resistance withimpedance adjustment means connected in series with a capacitor; aseries connected low impedance inductor with a linear inductivereactance and semiconductor gating means shunting said windings, meansresponsive to said means to integrate to activate said gating meansincluding a semiconductor voltage breakdown diode interconnecting saidcapacitor and said gating means, means to rectify an output voltagederived from said transformer, and means to alter the time constant ofsaid means to integrate in response to variations in the rectifiedoutput voltage, said means to alter including means to control saidimpedance adjustment means comprising a variable impedance transistordevice whereby said integrator integrates the volt-time area of voltageapplied to said windings and said gating means is activated at theattainment of a predetermined volt-time area as determined by said timeconstant, said gating means when activatedshortiiig said windings andhalting the increase in magnetic flux; in, said core thereby simulatingsaturation therein and" inducing switching action in said invertercircuit.

1. A DC to DC converter comprising an inverter circuit including atransformer with a feedback primary winding and an output secondarywinding, and means to control the switching frequency of said inverter,said means to control including a volt-time integrator to integrate thevoltage across said output secondary winding, said volt-time integratorcomprising a resistance with impedance adjustment means and a capacitor,a shunt path coupled across said output secondary winding, said shuntpath including a low impedance linear inductive reactance and asemiconductor gate connected in series thereto, said semiconductor gatehaving a control electrode, means to activate said gate in response to aparticular voltage magnitude across said capacitor including a voltagethreshold breakdown diode coupling said capacitor voltage to saidcontrol electrode, said inductive reactance inducing a reverse voltagein said output secondary winding to initiate switching action in saidinverter circuit when said gate is activated.
 2. A DC to DC converter asdefined in claim 1 wherein said transformer includes a saturatingwinding isolated from said inverter circuit and rectifying meaNs toderive a voltage from said saturating winding.
 3. A DC to DC converteras defined in claim 2 wherein a feedback arrangement responds tovariation in the voltage output of said rectifying means to alter theimpedance of said resistance.
 4. A free running voltage regulatedinverter circuit comprising two transistors, a transformer having aprimary winding and first and second secondary windings, saidtransformer including a magnetic path common to said primary and saidfirst secondary winding having linear magnetic characteristics andmagnetic shunt means to separate said first and second secondarywindings, said two transistors coupled to the primary winding of saidtransformer in a push-pull arrangement, means to simulate magneticsaturation in said first secondary winding of said transformer includingan energy storage device, means to control the rate at which said energystorage device stores energy, an inductive reactor, gating meansresponsive to a predetermined energy level in said energy storage deviceto shunt said inductive reactor across said first secondary of saidtransformer, said second secondary winding wound on a magnetic path ofsaid transformer having saturating characteristics, and feedback meansfrom said second secondary winding to said means to control the ratewhereby deviations in the voltage magnitude derived from said secondsecondary winding are utilized to adjust said means to control the rateto regulate the charging rate of said energy storage means which in turncontrols the switching frequency of said inverter in order to regulatethe voltage output of said second secondary winding.
 5. A free runningvoltage regulated inverter circuit as defined in claim 4 wherein saidmeans to control the rate comprises a variable impedance including adiode bridge coupled in parallel with a fixed impedance and a transistorwhose collector-emitter path shunts opposite terminals of said diodebridge and whose base is coupled to the voltage output of said secondsecondary winding.
 6. A free running voltage regulated inverter circuitas defined in claim 5 wherein said inductive reactor and said gate areseries connected, the said series connection being connected in shuntwith said first secondary winding whereby the reverse voltagecharacteristic of said inductive reactor induces switching in thetransistors of said inverter when said gate is triggered intoconduction.
 7. A free running voltage regulated inverter as defined inclaim 6 wherein said gate comprises a triac and a threshold responsivedevice to trigger said triac.
 8. A DC to DC converter comprising apush-pull square wave inverter circuit in which two switchingtransistors are arranged in a self-oscillating arrangement incombination with a transformer to produce an alternating current in thewindings of the transformer, means to simulate saturation in at least aportion of the core of said transformer common to said inverter circuit,said means to simulate including means to integrate the voltage appliedto the windings of said transformer, said means to integrate comprisinga resistance with impedance adjustment means connected in series with acapacitor, a series connected low impedance inductor with a linearinductive reactance and semiconductor gating means shunting saidwindings, means responsive to said means to integrate to activate saidgating means including a semiconductor voltage breakdown diodeinterconnecting said capacitor and said gating means, means to rectifyan output voltage derived from said transformer, and means to alter thetime constant of said means to integrate in response to variations inthe rectified output voltage, said means to alter including means tocontrol said impedance adjustment means comprising a variable impedancetransistor device whereby said integrator integrates the volt-time areaof voltage applied to said windings and said gating means is activatedat the attainment of a predetermined volt-time area as determined bysaid time constant, said gating means when activated shorting saidwindings and halting the increase in magnetic flux in said core therebysimulating saturation therein and inducing switching action in saidinverter circuit.